1. Field of the Invention
The invention relates generally to methods for forming bipolar transistor devices. More particularly, the invention relates to methods for forming bipolar transistor devices with enhanced performance.
2. Description of the Related Art
Semiconductor products often employ either or both of bipolar transistors and field effect transistors as switching devices or signal processing devices within electrical circuits. Digital semiconductor products generally employ field effect transistors while analog semiconductor products often employ bipolar transistors or bipolar complementary metal oxide semiconductor transistors (i.e., bipolar transistors in conjunction with field effect transistors).
Bipolar transistors are generally more complex to fabricate in comparison with field effect transistors. For that reason they are often difficult to fabricate with enhanced performance. In addition, such difficulties in fabrication are often more pronounced as bipolar transistor device dimensions are reduced.
It is thus desirable to provide methods for forming bipolar transistors with enhanced performance. The present invention is directed towards that object.
Various bipolar complementary metal oxide semiconductor transistors having desirable properties, and methods for fabrication thereof, have been disclosed in the semiconductor product fabrication art.
Included but not limiting among the methods are those disclosed within: (1) Lee, in U.S. Pat. No. 5,516,718 (a bipolar complementary metal oxide semiconductor transistor fabrication method that employs a polysilicon layer as a ion implant channeling reduction layer); (2) Robinson et al., in U.S. Pat. No. 5,541,120 (s bipolar complementary metal oxide semiconductor transistor fabrication method that employs annular insulator filler rings separating polysilicon emitter and extrinsic base regions); and (3) Naem, in U.S. Pat. No. 6,399,455 (a bipolar complementary metal oxide semiconductor transistor fabrication method that provides an ultra-small polysilicon emitter layer).
The disclosures of each of the foregoing references are incorporated herein fully by reference.
Desirable are additional methods for forming bipolar transistors and bipolar complementary metal oxide semiconductor transistors with enhanced performance.
The invention is directed towards the foregoing object.